1. Field of the Invention
The present invention relates to an integrated circuit. More particularly, the present invention relates to a semiconductor device and fabricating method thereof.
2. Description of the Related Art
In recent years, semiconductor materials have been used in all kinds of electronic industries due to its special conductive properties. The range of applications of semiconductor materials is wide. Many types of transistors, high voltage devices, logic devices and memory devices are fabricated using semiconductor materials. For example, non-volatile memory is one type of semiconductor device that has been widely used in personal computer systems and electron equipment because data can be stored, read out or erased many times and the stored data can be retained even after power is cut off.
In general, a non-volatile memory such as the silicon nitride read-only-memory is fabricated by forming an oxide-nitride-oxide (ONO) material layer over a substrate and then forming a doped polysilicon layer over the oxide-nitride-oxide material layer. Then, the doped polysilicon layer and the ONO material layer are patterned to form the gate (the doped polysilicon layer) and the ONO stacked structure underneath the gate. Finally, an ion implantation is carried out to implant ions into the substrate on each side of the ONO stacked structure to form a buried diffusion region that can serve as a buried bit line.
However, with the increase in the level of integration, the size of each memory device is also reduced. As a result, the length of the channel (the substrate region covered by the gate) in each memory device is also reduced. Since the dopants within the buried bit line formed by an ion implant process can easily diffuse when activated by a thermal processing operation, the effective length of the channel will be reduced leading to the occurrence of the so-called short channel effect.
In addition, the buried bit line (the doped region) has a moderately high resistance. After reducing the width of the buried bit line through miniaturization, the resistance will increase to an even higher level. One major consequence of having a higher resistance in the bit line is a drop in current during memory operation. The drop in current not only slows down the operation of the memory, but also wastes more electrical power. Moreover, the development of integrated circuits with a higher level of integration will certainly aggravate the aforementioned problem.